Now, I won't argue with cheaper to develop since analog is manual with a lot of issues to contend with. I'm just wondering if there are more applications that can get huge speedups at lower power or cost than digital. I know the ASIC makers in power-sensitive spaces are already moving parts of their chips to analog for power reduction. That's what mixed-signal people tell me anyway: the specifics are often secret. So, I have to dig into CompSci looking for what they've tried.
The analogue neural net stuff is quite a reasonable example, because it's specifically trying to mimic a real analogue system and tends to be noise-tolerant.
Couple of points from your lower link:
- return of "wafer-scale"! Nice.
- " the average power consumption is expected to stay below 1 kW for a single wafer"; not bad but you're still going to need to cool that
- actually a hybrid system: long range comms is digital and multiplexed to save wiring, converted to analogue at the synapse
- "All analog parameters are stored in non-volatile
single-poly floating-gate analog storage cells developed for
the
FACETS
project" => basically analogue Flash? A development of MLC I suppose
On reading the whole thing, it seems the magic is actually in choosing which bits to make digital. The "long range" neural events are sent as differential 6-bit bursts, multiplexed, which they claim saves significant power.
http://www.cisl.columbia.edu/grads/gcowan/vlsianalog.pdf
http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.325...
Now, I won't argue with cheaper to develop since analog is manual with a lot of issues to contend with. I'm just wondering if there are more applications that can get huge speedups at lower power or cost than digital. I know the ASIC makers in power-sensitive spaces are already moving parts of their chips to analog for power reduction. That's what mixed-signal people tell me anyway: the specifics are often secret. So, I have to dig into CompSci looking for what they've tried.